Calculate PCB trace impedance for microstrip and stripline configurations. Supports single-ended and differential pairs with dielectric constant and geometry inputs.
The PCB Impedance Calculator determines characteristic impedance for printed circuit board traces in microstrip and stripline configurations. Controlled impedance is critical for high-speed digital designs, RF circuits, and any PCB carrying signals above a few hundred MHz where transmission line effects become significant.
This tool covers the most common PCB geometries: surface microstrip (trace above a ground plane), embedded microstrip (trace with solder mask), stripline (trace between two ground planes), and differential pairs for both configurations. Each calculation uses industry-standard empirical formulas validated against field solvers.
The calculator accepts standard PCB manufacturing parameters—trace width, trace thickness, dielectric height, dielectric constant (Er), and for differential pairs, trace spacing. It outputs impedance in ohms along with effective dielectric constant, propagation delay, and wavelength at your specified frequency, helping you design PCB stackups that meet impedance targets for USB, HDMI, PCIe, DDR, and other high-speed interfaces. It also gives you a fast check on whether a chosen stackup can realistically hit the target before you send the board out.
Use this calculator when you need to size PCB traces for a target impedance instead of guessing from a rule of thumb. It is useful for high-speed digital, RF, and differential-pair layout work where stackup details matter. The result depends on geometry and dielectric values, so it is more dependable than a generic trace-width estimate.
Microstrip Z₀ ≈ (87/√(Er+1.41)) × ln(5.98h / (0.8w + t)) for w/h ≤ 1. Stripline Z₀ ≈ (60/√Er) × ln(4b / (0.67π(0.8w + t))). Differential: Zdiff = 2 × Z₀ × (1 − 0.48 × e^(−0.96s/h)). Where w=width, h=height, t=thickness, b=total height, s=spacing.
Result: 50.2Ω (target: 50Ω)
A 6mil (0.15mm) wide trace, 1.4mil (0.035mm) thick, over 8mil (0.2mm) FR-4 (Er=4.3) gives approximately 50Ω characteristic impedance—ideal for most single-ended high-speed signals.
Achieving target impedance starts with stackup design. A typical 4-layer board might use: Layer 1 (signal), Layer 2 (ground), Layer 3 (power), Layer 4 (signal). The dielectric between signal and ground layers determines microstrip impedance. Common prepreg thicknesses are 3-10 mils, with trace widths calculated to hit 50Ω. Work with your PCB manufacturer early—they can recommended trace widths for their standard stackups.
Different interfaces have specific impedance targets: USB 2.0/3.x uses 90Ω differential, HDMI uses 100Ω differential, PCIe uses 85Ω differential, DDR4 uses 40Ω single-ended, Ethernet uses 100Ω differential, and SATA uses 50Ω single-ended. Meeting these targets within ±10% ensures compliant signal quality and successful certification testing.
PCB manufacturers typically guarantee impedance within ±10% of target. They produce test coupons—small trace samples on each panel—and measure with TDR (Time Domain Reflectometry) to verify impedance. For tighter tolerances (±5%), expect higher costs. Always request impedance test reports for controlled-impedance boards and include test coupons in your panel design.
Most standards specify 50Ω single-ended (USB, PCIe, SATA) or 90-100Ω differential (USB3: 90Ω, HDMI: 100Ω, Ethernet: 100Ω, DDR: 100Ω). RF designs typically use 50Ω (test equipment) or 75Ω (video/antenna).
Standard FR-4 has Er ≈ 4.2-4.5 at 1 GHz. It varies with frequency, temperature, and resin content. For designs above 5 GHz, consider low-loss materials like Rogers or Megtron with Er ≈ 3.0-3.6.
Empirical formulas are accurate to within 2-5% for typical PCB geometries. For critical designs, use a 2D field solver (e.g., built into Altium, Cadence, or freeware like ATLC). Manufacturing tolerances (±10%) often dominate accuracy.
The strongest factors are trace width and dielectric height. Doubling trace width reduces impedance by ~30%. Doubling dielectric height increases impedance by ~30%. Copper thickness and Er have smaller effects.
Microstrip is a trace on the outer layer above a ground plane—it's exposed to air, giving lower effective Er. Stripline is an inner-layer trace between two ground planes—fully enclosed in dielectric, with better shielding but harder to manufacture precisely.
Impedance mismatches cause signal reflections, ringing, and degraded signal integrity. At high frequencies, even a 10% impedance mismatch can cause significant reflections. Controlled impedance ensures clean signal transmission and meets interface specifications.