Compute logical NOR and bitwise NOR, see truth tables, universal gate proofs (build AND/OR/NOT from NOR), bit-by-bit visualization, and multi-input NOR.
The NOR gate — short for "NOT OR" — is one of the most important operations in digital logic because it is a universal gate. This means that any Boolean function can be implemented using only NOR gates, making it the foundational building block of circuit design. If you had an unlimited supply of NOR gates and nothing else, you could build an entire computer.
NOR computes the complement of the OR operation: it returns true only when all inputs are false. The moment any input becomes true, the NOR output drops to false. In a two-input truth table, NOR yields 1 for the single case (0,0) and 0 for the other three cases — the exact inverse of OR.
At the bitwise level, NOR applies this logic to each corresponding bit pair: compute OR, then flip every bit. This makes bitwise NOR useful for clearing specific bit patterns and creating inverted masks. NOR's universality is proven by constructing NOT (A NOR A), AND ((A NOR A) NOR (B NOR B)), and OR ((A NOR B) NOR (A NOR B)) entirely from NOR gates.
This calculator supports both logical and bitwise NOR for up to four inputs, with configurable bit widths. It includes a live universal-gate proof section that constructs AND, OR, and NOT from NOR using your actual input values and verifies the results match, making it an interactive digital-logic learning tool.
NOR is one of two universal gates and the foundation of several hardware families, yet its bit-level behaviour is non-obvious because it combines OR and NOT in a single operation. This calculator applies NOR bitwise across 8-, 16-, or 32-bit operands, showing the binary representation at every stage so you can trace each bit through the OR and inversion steps. It also proves NOR's universality by constructing NOT, AND, and OR from NOR gates alone, letting you verify the gate-count claims found in digital-logic textbooks.
A NOR B = NOT(A OR B). Bitwise NOR: apply OR per bit, then invert each bit (within the chosen bit width).
Result: 0 (0x00)
170 = 10101010, 85 = 01010101. OR gives 11111111 (255). NOR inverts to 00000000 (0).
The NOR operation performs an OR on each bit pair, then inverts every bit of the result. In 8-bit mode: 170 = 10101010 and 85 = 01010101. OR gives 11111111 (255); inverting every bit within the 8-bit width yields 00000000 (0). The inversion step is bounded by the chosen bit width — bits above that width are masked off — which is why the bit-width toggle matters: 8-bit NOR of 170 and 0 gives 85, but 16-bit NOR gives 65365.
Any Boolean function can be built from NOR gates alone. NOT requires one gate (A NOR A), OR requires two (NOR the NOR), AND requires three (NOR each input with itself, then NOR the results), and XOR can be built with four or five depending on the optimisation. This universality means an entire processor could theoretically be constructed using a single gate type, which simplifies manufacturing. In practice, CMOS libraries still use NOR alongside NAND because certain logic functions map more naturally to one or the other.
The Apollo Guidance Computer famously used only NOR gates (about 5,600 of them) for its entire logic design. In modern CMOS, NOR gates have PMOS transistors in series and NMOS in parallel, making them slightly slower than NAND gates (which have the opposite topology). ECL (emitter-coupled logic) and some flash-memory architectures still favour NOR because of its read-speed advantage. Understanding NOR's properties helps hardware engineers choose the right gate library for timing-critical paths.
A NOR gate computes NOT(A OR B). It outputs true (1) only when all inputs are false (0). It is the complement of the OR gate.
Because any Boolean function can be built using only NOR gates. You can construct NOT, AND, OR, XOR, NAND — every gate — from combinations of NOR. This is proven by functional completeness in Boolean algebra.
Connect the same input to both terminals: A NOR A = NOT(A OR A) = NOT A. This uses just one NOR gate.
AND(A,B) = (A NOR A) NOR (B NOR B). First compute NOT A and NOT B using NOR, then NOR those together. This uses 3 NOR gates total.
OR(A,B) = (A NOR B) NOR (A NOR B). Compute NOR, then NOR the result with itself (which is NOT). This uses 3 NOR gates if you duplicate the first NOR, or 2 if you share.
NAND is more common in practice because NAND gates are slightly faster in CMOS technology (PMOS transistors in the pull-up network are in parallel). However, NOR is preferred in some technologies like ECL (emitter-coupled logic).